accel34.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/

 
#ifndef ACCEL34_H
#define ACCEL34_H
 
#ifdef __cplusplus
extern "C"{
#endif

#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"




#define ACCEL34_REG_DEVID_AD                0x00
#define ACCEL34_REG_DEVID_MST               0x01
#define ACCEL34_REG_PART_ID                 0x02
#define ACCEL34_REG_PART_ID_REV_ID          0x03
#define ACCEL34_REG_SERIAL_NUMBER_0         0x04
#define ACCEL34_REG_SERIAL_NUMBER_1         0x05
#define ACCEL34_REG_SERIAL_NUMBER_2         0x06
#define ACCEL34_REG_SERIAL_NUMBER_3         0x07
#define ACCEL34_REG_SERIAL_NUMBER_4         0x08
#define ACCEL34_REG_SERIAL_NUMBER_5         0x09
#define ACCEL34_REG_SERIAL_NUMBER_6         0x0A
#define ACCEL34_REG_DEV_DELTA_Q_X           0x0B
#define ACCEL34_REG_DEV_DELTA_Q_Y           0x0C
#define ACCEL34_REG_DEV_DELTA_Q_Z           0x0D
#define ACCEL34_REG_DEV_DELTA_F0_X          0x0E
#define ACCEL34_REG_DEV_DELTA_F0_Y          0x0F
#define ACCEL34_REG_DEV_DELTA_F0_Z          0x10
#define ACCEL34_REG_STATUS0                 0x11
#define ACCEL34_REG_STATUS1                 0x12
#define ACCEL34_REG_STATUS2                 0x13
#define ACCEL34_REG_STATUS3                 0x14
#define ACCEL34_REG_XDATA_H                 0x15
#define ACCEL34_REG_XDATA_L                 0x16
#define ACCEL34_REG_YDATA_H                 0x17
#define ACCEL34_REG_YDATA_L                 0x18
#define ACCEL34_REG_ZDATA_H                 0x19
#define ACCEL34_REG_ZDATA_L                 0x1A
#define ACCEL34_REG_TDATA_H                 0x1B
#define ACCEL34_REG_TDATA_L                 0x1C
#define ACCEL34_REG_FIFO_DATA               0x1D
#define ACCEL34_REG_FIFO_STATUS0            0x1E
#define ACCEL34_REG_FIFO_STATUS1            0x1F
#define ACCEL34_REG_MISC0                   0x20
#define ACCEL34_REG_MISC1                   0x21
#define ACCEL34_REG_SENS_DSM                0x24
#define ACCEL34_REG_CLK_CTRL                0x25
#define ACCEL34_REG_OP_MODE                 0x26
#define ACCEL34_REG_DIG_EN                  0x27
#define ACCEL34_REG_SAR_I2C                 0x28
#define ACCEL34_REG_NVM_CTL                 0x29
#define ACCEL34_REG_RESET                   0x2A
#define ACCEL34_REG_INT0_MAP0               0x2B
#define ACCEL34_REG_INT0_MAP1               0x2C
#define ACCEL34_REG_INT1_MAP0               0x2D
#define ACCEL34_REG_INT1_MAP1               0x2E
#define ACCEL34_REG_FIFO_CFG0               0x30
#define ACCEL34_REG_FIFO_CFG1               0x31
#define ACCEL34_REG_SPT_CFG0                0x32
#define ACCEL34_REG_SPT_CFG1                0x33
#define ACCEL34_REG_SPT_CFG2                0x34
#define ACCEL34_REG_SYNC_CFG                0x35
#define ACCEL34_REG_PDM_CFG                 0x36
#define ACCEL34_REG_ACT_INACT_CTL           0x37
#define ACCEL34_REG_SNSR_AXIS_EN            0x38
#define ACCEL34_REG_THRESH_ACT_H            0x39
#define ACCEL34_REG_THRESH_ACT_L            0x3A
#define ACCEL34_REG_TIME_ACT_H              0x3B
#define ACCEL34_REG_TIME_ACT_M              0x3C
#define ACCEL34_REG_TIME_ACT_L              0x3D
#define ACCEL34_REG_THRESH_INACT_H          0x3E
#define ACCEL34_REG_THRESH_INACT_L          0x3F
#define ACCEL34_REG_TIME_INACT_H            0x40
#define ACCEL34_REG_TIME_INACT_M            0x41
#define ACCEL34_REG_TIME_INACT_L            0x42
#define ACCEL34_REG_TAP_THRESH              0x43
#define ACCEL34_REG_TAP_DUR                 0x44
#define ACCEL34_REG_TAP_LATENT              0x45
#define ACCEL34_REG_TAP_WINDOW              0x46
#define ACCEL34_REG_TAP_CFG                 0x47
#define ACCEL34_REG_OR_CFG                  0x48
#define ACCEL34_REG_TRIG_CFG                0x49
#define ACCEL34_REG_X_SAR_OFFSET            0x4A
#define ACCEL34_REG_Y_SAR_OFFSET            0x4B
#define ACCEL34_REG_Z_SAR_OFFSET            0x4C
#define ACCEL34_REG_X_DSM_OFFSET            0x4D
#define ACCEL34_REG_Y_DSM_OFFSET            0x4E
#define ACCEL34_REG_Z_DSM_OFFSET            0x4F
#define ACCEL34_REG_FILTER                  0x50
#define ACCEL34_REG_USER_TEMP_SENS_0        0x55
#define ACCEL34_REG_USER_TEMP_SENS_1        0x56
#define ACCEL34_REG_MISO                    0x58
#define ACCEL34_REG_SOUT0                   0x59
#define ACCEL34_REG_MCLK                    0x5A
#define ACCEL34_REG_BCLK                    0x5B
#define ACCEL34_REG_FSYNC                   0x5C
#define ACCEL34_REG_INT0                    0x5D
#define ACCEL34_REG_INT1                    0x5E
 // accel34_reg



#define ACCEL34_INTX_MAP0_NVM_BUSY          0x80
#define ACCEL34_INTX_MAP0_INACT             0x40
#define ACCEL34_INTX_MAP0_ACT               0x20
#define ACCEL34_INTX_MAP0_FIFO_WATERMARK    0x08
#define ACCEL34_INTX_MAP0_FIFO_OVERRUN      0x04
#define ACCEL34_INTX_MAP0_FIFO_FULL         0x02
#define ACCEL34_INTX_MAP0_DATA_RDY          0x01
#define ACCEL34_INTX_MAP1_NVM_DONE          0x80
#define ACCEL34_INTX_MAP1_NVM_IRQ           0x40
#define ACCEL34_INTX_MAP1_UV_FLAG           0x20
#define ACCEL34_INTX_MAP1_OVER_RANGE        0x10
#define ACCEL34_INTX_MAP1_PARITY_ERR        0x08
#define ACCEL34_INTX_MAP1_TRIPLE_TAP        0x04
#define ACCEL34_INTX_MAP1_DOUBLE_TAP        0x02
#define ACCEL34_INTX_MAP1_SINGLE_TAP        0x01

#define ACCEL34_OP_MODE_RANGE_15G           0x00
#define ACCEL34_OP_MODE_RANGE_30G           0x40
#define ACCEL34_OP_MODE_RANGE_60G           0x80
#define ACCEL34_OP_MODE_RANGE_MASK          0xC0
#define ACCEL34_OP_MODE_PDM_MODE_DIS        0x00
#define ACCEL34_OP_MODE_PDM_MODE_EN         0x20
#define ACCEL34_OP_MODE_PDM_MODE_MASK       0x20
#define ACCEL34_OP_MODE_AUDIO_MODE_DIS      0x00
#define ACCEL34_OP_MODE_AUDIO_MODE_EN       0x10
#define ACCEL34_OP_MODE_AUDIO_MODE_MASK     0x10
#define ACCEL34_OP_MODE_STANDBY             0x00
#define ACCEL34_OP_MODE_HEART_SOUND         0x01
#define ACCEL34_OP_MODE_ULP                 0x02
#define ACCEL34_OP_MODE_VLP                 0x03
#define ACCEL34_OP_MODE_LP                  0x04
#define ACCEL34_OP_MODE_LP_ULP              0x06
#define ACCEL34_OP_MODE_LP_VLP              0x07
#define ACCEL34_OP_MODE_RBW                 0x08
#define ACCEL34_OP_MODE_RBW_ULP             0x0A
#define ACCEL34_OP_MODE_RBW_VLP             0x0B
#define ACCEL34_OP_MODE_HP                  0x0C
#define ACCEL34_OP_MODE_HP_ULP              0x0E
#define ACCEL34_OP_MODE_HP_VLP              0x0F
#define ACCEL34_OP_MODE_MASK                0x0F

#define ACCEL34_DIG_EN_MODE_CHANNEL_EN_X    0x10
#define ACCEL34_DIG_EN_MODE_CHANNEL_EN_Y    0x20
#define ACCEL34_DIG_EN_MODE_CHANNEL_EN_Z    0x40
#define ACCEL34_DIG_EN_MODE_CHANNEL_EN_TEMP 0x80
#define ACCEL34_DIG_EN_MODE_CHANNEL_EN_ALL  0xF0
#define ACCEL34_DIG_EN_MODE_CHANNEL_EN_MASK 0xF0
#define ACCEL34_DIG_EN_FIFO_EN_DIS          0x00
#define ACCEL34_DIG_EN_FIFO_EN_EN           0x08
#define ACCEL34_DIG_EN_FIFO_EN_MASK         0x08
#define ACCEL34_DIG_EN_INT01_EVENT_LIVE     0x00
#define ACCEL34_DIG_EN_INT01_EVENT_EVENT    0x02
#define ACCEL34_DIG_EN_INT01_EVENT_MASK     0x02
#define ACCEL34_DIG_EN_PARITY_EN_DIS        0x00
#define ACCEL34_DIG_EN_PARITY_EN_EN         0x01
#define ACCEL34_DIG_EN_PARITY_EN_MASK       0x01

#define ACCEL34_STATUS3_DATA_READY          0x01

#define ACCEL34_RESET                       0x02

#define ACCEL34_DEVID_AD                    0xAD
#define ACCEL34_DEVID_MST                   0x1D

#define ACCEL34_ACCEL_FSR_15G               0
#define ACCEL34_ACCEL_FSR_30G               1
#define ACCEL34_ACCEL_FSR_60G               2

#define ACCEL34_SCALE_FACTOR_LSB_PER_G      2000.0f
#define ACCEL34_TEMP_SENS                   10.2f
#define ACCEL34_TEMP_OFFSET_LSB             295

#define ACCEL34_DEVICE_ADDRESS_0            0x1D
#define ACCEL34_DEVICE_ADDRESS_1            0x53
#define ACCEL34_DEVICE_ADDRESS_2            0x54
#define ACCEL34_DEVICE_ADDRESS_3            0x55
 // accel34_set



#define ACCEL34_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
    cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
    cfg.int0 = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.int1 = MIKROBUS( mikrobus, MIKROBUS_INT )
 // accel34_map // accel34

typedef struct
{
    // Input pins
    digital_in_t int0;      
    digital_in_t int1;      
 
    // Modules
    i2c_master_t i2c;       
 
    // I2C slave address
    uint8_t slave_address;  
 
    float accel_sens;       
 
} accel34_t;

typedef struct
{
    pin_name_t scl;         
    pin_name_t sda;         
 
    pin_name_t int0;        
    pin_name_t int1;        
 
    uint32_t   i2c_speed;   
    uint8_t    i2c_address; 
 
} accel34_cfg_t;

typedef struct
{
    float x;                        
    float y;                        
    float z;                        
 
} accel34_axes_t;

typedef struct
{
    accel34_axes_t accel;           
    float temperature;              
 
} accel34_data_t;

typedef enum
{
    ACCEL34_OK = 0,
    ACCEL34_ERROR = -1,
    ACCEL34_DATA_NOT_READY = -2
 
} accel34_return_value_t;


void accel34_cfg_setup ( accel34_cfg_t *cfg );

err_t accel34_init ( accel34_t *ctx, accel34_cfg_t *cfg );

err_t accel34_default_cfg ( accel34_t *ctx );

err_t accel34_write_regs ( accel34_t *ctx, uint8_t reg, uint8_t *data_in, uint8_t len );

err_t accel34_read_regs ( accel34_t *ctx, uint8_t reg, uint8_t *data_out, uint8_t len );

err_t accel34_write_reg ( accel34_t *ctx, uint8_t reg, uint8_t data_in );

err_t accel34_read_reg ( accel34_t *ctx, uint8_t reg, uint8_t *data_out );

uint8_t accel34_get_int0_pin ( accel34_t *ctx );

uint8_t accel34_get_int1_pin ( accel34_t *ctx );

err_t accel34_check_communication ( accel34_t *ctx );

err_t accel34_reset_device ( accel34_t *ctx );

err_t accel34_set_op_mode ( accel34_t *ctx, uint8_t op_mode );

err_t accel34_set_accel_fsr ( accel34_t *ctx, uint8_t fsr );

err_t accel34_get_drdy ( accel34_t *ctx, uint8_t *drdy );

err_t accel34_get_accel ( accel34_t *ctx, accel34_axes_t *accel );

err_t accel34_get_temp ( accel34_t *ctx, float *temp );

err_t accel34_get_data ( accel34_t *ctx, accel34_data_t *data_out );
 
#ifdef __cplusplus
}
#endif
#endif // ACCEL34_H
 // accel34
 
// ------------------------------------------------------------------------ END